/* j_3_P_10
Create a class Stud that has Rollno as data member and getdno & putdno as member
functions. Create a class Exam that has sub1, sub2 & sub3 as data member and getdmarks
& putmarks as member functions. Exam class will inherits Stud class. Create a class
Sports that has score as data member and getscore & putdscore as member functions.
Sports will inherits Stud. Create a class Result that will inherits Sports and Exam class.
Create object of Result class then get and display data members.
*/
#include <iostream.h>
#include <conio.h>
class stud
{
int rno;
public:
void getdno()
{
cout << "Enter roll no. : ";
cin >> rno;
}
void putdno()
{
cout << "Roll No. is : " << rno;
}
};
class exam : virtual public stud
{
int sub1, sub2, sub3;
public:
void getmarks()
{
cout << "Enter sub1 mark : ";
cin >> sub1;
cout << "Enter sub2 mark : ";
cin >> sub2;
cout << "Enter sub3 mark : ";
cin >> sub3;
}
void putmarks()
{
cout << "Sub1 mark is : " << sub1 << endl;
cout << "Sub2 mark is : " << sub1 << endl;
cout << "Sub3 mark is : " << sub1 << endl;
}
};
class sport : virtual public stud
{
int s;
public:
void getscore()
{
cout << "Enter score. : ";
cin >> s;
}
void putscore()
{
cout << "Score is : " << s;
}
};
class result : public exam, public sport
{};
void main()
{
clrscr();
result obj;
obj.getdno();
obj.putdno();
obj.getmarks();
obj.putmarks();
obj.getscore();
obj.putscore();
getch();
}
Questions 2 : Assume there are three small caches, each consisting of four one-word blocks. On cache is direct-mapped, a second is two-way set-associative, and the third is fully associative. Find the number of hits for each cache organization given the following sequence of block addresses: 0, 8, 6, 5, 10, 15 and 8 are accessed twice in the same sequence. Make a tabular column as given below to show the cache content on each of columns as required. Show all the pass independently pass. Draw as many numbers Assume the writing policy is LRU. Memory location Hit/Mis Add as many columns as required
Answer : Sequence of Block Addresses: 0, 8, 6, 5, 10, 15, 8 (accessed twice in the same sequence) Cache Configurations: Direct-Mapped Cache : 4 blocks Two-Way Set-Associative Cache : 2 sets with 2 blocks each Fully Associative Cache : 4 blocks Simulation: Direct-Mapped Cache: Access Address Index Cache Content Hit/Miss 1 0 0 0 Miss 2 8 0 8 Miss 3 6 2 8, 6 Miss 4 5 1 8, 6, 5 Miss 5 10 2 8, 10, 5 Miss 6 15 3 8, 10, 5, 15 Miss 7 8 0 8, 10, 5, 15 Hit 8 0 0 0, 10, 5, 15 Miss 9 8 0 8, 10, 5, 15 Miss 10 6 2 8, 6, 5, 15 Miss 11 5 1 8, 6, 5, 15 Hit 12 10 2 8, 10, 5, 15 Miss 13 15 3 8, 10, 5, 15 Hit 14 8 0 8, 10, 5, 15 Hit Direct-Mapped Cache Hits: 3 Two-Way Set-Associative Cache: Access Address Index Set Content Hit/Miss 1 0 0 (0, -) Miss 2 8 0 (0, 8) Miss 3 6 1 (0, 8), (6, -) Miss 4 5 1 (0, 8), (6, 5) Miss 5 10 0 (10, 8), (6, 5) Miss 6 15 1 (10, 8), (6, 15) Miss 7 8 0 (10, 8), (6, 15) Hit 8 0 0 (0, 8), (6, 15) Miss 9 8 0 (0, 8), (6, 15) Hit 10 6 1 (0, 8), (6, 15) Hit 11 5 1 (0, 8), (5, 15) M
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